MPLAB X IDE BUILD FAILED (exit value 2 – C / C++ – Fórum – Programujte.com

Ahoj, potřeboval bych poradit s chybou kodu nevím jestli je v syntaxi nebo v něčem jiném.Vždy jsem dělal HEX v MIKROC ale ted jsem donucen k MPLAB a hned mně vyjde chyba přesněji:

Vím,že je špatná cesta,ale nevím jak to mám spravit.Dělám to podle tutorialu,protože fakt nevím jak to mám udělat já v MPLAB X IDE,totiž MIKROC byl od MPLAB tak lehký,ale jen síla zvyku .https://www.youtube.com/watch?v=mUofSucHx_E
 

XC8.h

#pragma PIC18F2220 Configuration Bit Settings

  #pragma ASM source line config statements

#include "p18F2220.inc"

 #pragma CONFIG1H
   #pragma CONFIG  OSC = INTIO2          ; Oscillator Selection bits (Internal RC oscillator, port function on RA6 and port function on RA7)
  #pragma CONFIG  FSCM = OFF            ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
  #pragma CONFIG  IESO = OFF            ; Internal/External Switchover bit (Internal/External Switchover mode disabled)

 #pragma CONFIG2L
  #pragma  CONFIG  PWRT = OFF            ; Power-up Timer enable bit (PWRT disabled)
   #pragma CONFIG  BOR = OFF             ; Brown-out Reset enable bit (Brown-out Reset disabled)
  #pragma CONFIG  BORV = 20             ; Brown-out Reset Voltage bits (VBOR set to 2.0V)

 #pragma CONFIG2H
 #pragma  CONFIG  WDT = OFF             ; Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
 #pragma  CONFIG  WDTPS = 32768         ; Watchdog Timer Postscale Select bits (1:32768)

 #pragma CONFIG3H
  #pragma CONFIG  CCP2MX = ON           ; CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
  #pragma CONFIG  PBAD = ANA            ; PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
  #pragma CONFIG  MCLRE = OFF           ; MCLR Pin Enable bit (MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20))

 #pragma CONFIG4L
  #pragma CONFIG  STVR = ON             ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
  #pragma CONFIG  LVP = ON              ; Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)

 #pragma CONFIG5L
 #pragma  CONFIG  CP0 = OFF             ; Code Protection bit (Block 0 (000200-0007FFh) not code-protected)
  #pragma CONFIG  CP1 = OFF             ; Code Protection bit (Block 1 (000800-000FFFh) not code-protected)

 #pragma CONFIG5H
  #pragma CONFIG  CPB = OFF             ; Boot Block Code Protection bit (Boot block (000000-0001FFh) is not code-protected)
   #pragma CONFIG  CPD = OFF             ; Data EEPROM Code Protection bit (Data EEPROM is not code-protected)

 #pragma CONFIG6L
 #pragma  CONFIG  WRT0 = OFF            ; Write Protection bit (Block 0 (000200-0007FFh) not write-protected)
   #pragma CONFIG  WRT1 = OFF            ; Write Protection bit (Block 1 (000800-000FFFh) not write-protected)

 #pragma CONFIG6H
  #pragma CONFIG  WRTC = OFF            ; Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
  #pragma CONFIG  WRTB = OFF            ; Boot Block Write Protection bit (Boot block (000000-0001FFh) is not write-protected)
  #pragma CONFIG  WRTD = OFF            ; Data EEPROM Write Protection bit (Data EEPROM is not write-protected)

 #pragma CONFIG7L
  #pragma CONFIG  EBTR0 = OFF           ; Table Read Protection bit (Block 0 (000200-0007FFh) not protected from table reads executed in other blocks)
  #pragma CONFIG  EBTR1 = OFF           ; Table Read Protection bit (Block 1 (000800-000FFFh) not protected from table reads executed in other blocks)

 #pragma CONFIG7H
  #pragma CONFIG  EBTRB = OFF           ; Boot Block Table Read Protection bit (Boot block (000000-0001FFh) is not protected from table reads executed in other blocks)
#define _XTAL_FREQ 8000000

XC8.c

#include <stdio.h>
#include <stdlib.h>
#include"XC8.h"
/*
 * 
 */
void main(void) {
    TRISBbits.RB0 =0;
    OSCCON = 0x76;
    
    while(1){
        LATBbits.LATB0=~LATBbits.LATB0;
        for(int countDelay=0;countDelay<20;countDelay ++)__delay_ms(50);
    }
}